Version 4.0 of the PCIe computer bus standard will arrive in 2017 according to PCMag.
Version 4.0 of the PCIe specification, which will introduce greatly increased speeds as well as other improvements intended to make it viable in a wider range of applications, is slated to be released in early 2017. PCIe 4.0 will essentially double the interconnect performance bandwidth of the current 3.0 specification, from 8 gigatransfers per second (GTps) to 16GTps. In addition, it introduces new technologies to enhance power efficiency: the use of an L1 substate that drastically lowers power use in idle mode; half-swing and quarter-swing, which cut power consumption by 400mV and 200mV, respectively; and high-speed data transfer bursts with minimum idle power.